Across virtually all applications, there continues to be growing demand for reducing size and increasing performance of integrated circuits. The seemingly endless demand is no more visible than in products of our daily lives. Smaller and denser integrated circuits are required in many portable electronic products, such as cell phones, portable computers, voice recorders, etc. as well as in many larger electronic systems, such as cars, planes, industrial control systems, etc. As the demand grows for smaller electronic products with more features, manufacturers are seeking ways to include more features as well as reduce the size of the integrated circuits. To meet these needs, integrated circuits are increasingly using smaller form factors with more connections.
Wafer manufacturers strive to reduce transistor or capacitor feature size in order to increase circuit density and enhance functionality. Device geometries with sub-micron line widths are so common that individual chips routinely contain millions of electronic devices. Reduced feature size has been quite successful in improving electronic systems, and continuous development is expected in the future. However, significant obstacles to further reduction in feature size are being encountered. Attention has therefore increasingly shifted to integrated circuit interconnection as a means to fulfill the relentless demands for increased density and reduced area.
Chip scale interconnection, including flipchips, allow higher performance and reduced area for integrated circuits. Flipchips use connections directly on integrated circuits to interconnect to a mount or a system. Integrated circuit input/output pads are typically unsolderable and susceptible to corrosion if left exposed. Consequently, bond pads are often formed to include the input/output pad and one or more additional metal layers that promote wetting and metallurgical bonding with solder bump alloys. The additional metal layers, or under bump metallurgy (UBM), provides a surface that will readily bond with solder balls or bumps.
Other aids may be used including what is commonly referred to as a “solder mask” or “coverlay”. The solder mask layer may be applied by laminating a preformed dielectric sheet to the surface of the dielectric element, or by forming the dielectric sheet from a curable liquid on the surface of the dielectric element. The solder mask has holes at spacing corresponding to the spacing of the pads. The solder mask closely overlies the trace-bearing surface of the panel and closely overlies the metallic traces, leaving all or part of each pad exposed at the corresponding hole in the solder mask.
A mass of solder may be deposited on each pad, either by exposing the assembly to a liquid solder to form solder balls or solder bumps onto the pads. The molten solder forms a strong bond to the metal of the pads. The solder mask layer, which does not bond to the solder, confines the solder on the pads. In the absence of the solder mask layer, the molten solder could bond to metal in the traces extending away from the pads and could flow outwardly, along the traces. This would provide solder in undesired locations and displace the solder mass from its desired location, centered on the pad. The undesired solder flow can also remove solder from the pads where it is required for forming the joints. The solder mask prevents this undesired flow.
Existing attempts to interconnect integrated circuits with solder, suffer from misalignment of the solder mask layer and the pad or UBM. This misalignment results in poor, unreliable, or missing connections. Attempts to solve this misalignment have resulted in creating large pads and UBM structures to account for offsets between the solder mask and the pad or UBM. A large pad and associated UBM create additional problems including defeating the solder mask's ability to confine the solder, increasing intermetallic cracking, weakening intermetallic bonding, and decreasing pad density.
Thus, a need still remains for an integrated circuit mount system to provide improved solder on pad area, accuracy, and reliability. In view of the increasing demand for improved integrated circuits and particularly more functions in smaller products at lower costs, it is increasingly critical that answers be found to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.